Chek Yee, O. (2019) “Device-Circuit Level Simulation Study of Three Inputs Complex Logic Gate Designed Using Nano-MOSFETs”, Applications of Modelling and Simulation, 3(1), pp. 1–10. Available at: https://www.ojs.arqiipubl.com/index.php/AMS_Journal/article/view/58 (Accessed: 9 May 2026).