CHEK YEE, Ooi. Device-Circuit Level Simulation Study of Three Inputs Complex Logic Gate Designed Using Nano-MOSFETs. Applications of Modelling and Simulation, [S. l.], v. 3, n. 1, p. 1–10, 2019. Disponível em: https://www.ojs.arqiipubl.com/index.php/AMS_Journal/article/view/58. Acesso em: 9 may. 2026.